Madhavvij

A complete MIPS-like pipelined processor in Verilog with 6 custom instructions and full RAW hazard resolution via a forwarding unit, eliminating all pipeline stalls. Synthesized on an Artix-7 FPGA using Xilinx Vivado.

An event-triggered fault logger on ZedBoard FPGA capturing 10+ VCU parameters, including real-time temperature via a Pmod TMP2 sensor over I2C. Built for edge deployment with 32 KB BRAM circular buffering.

A 10-state FSM traffic controller in Verilog that reads real-time sensor data to adapt signal timing. Verified in Icarus Verilog with GTKWave waveform analysis, achieving 30% congestion reduction at a 4-way intersection.

A wearable step and jump counter using MPU6050 and ESP32 with an FSM-based motion classifier. Achieves 95%+ accuracy across 100+ test cycles through adaptive threshold tuning, exponential filtering, and free-fall detection.

A digital frequency meter designed in KiCad using a NE555B oscillator and CD4583 Schmitt trigger for signal conditioning, feeding into cascaded CD4026BE decade counters driving 7-segment displays. Includes a full PCB layout with a transformer-based regulated power supply.

A deep learning model fusing CT scan images via EfficientNetB0 with genomic mutation data from a 10-gene panel. Uses feature selection and 5-fold cross-validation for 3-class cancer stage classification.

A secure Electronic Voting Machine simulation built from scratch on Arduino Mega. Demonstrates a practical embedded systems application with tamper-proof voting logic and real-time result display.

Hands-on work in Electronics and SATCOM Systems, covering high-power amplifiers, dual transmitter-receiver modules, and antenna systems. Worked on SATCOM system testing using GUI-based software and earth resistance measurement.

Web scraping solutions in Python using BeautifulSoup and Selenium to pull data from government portals. Handled CAPTCHAs with Tesseract OCR and OpenCV, and processed PDF data into structured CSV and Excel files.

Launched and pitched a legal recruitment startup addressing real inefficiencies in the hiring process. Managed operations end to end, built a candidate database, and negotiated early partnerships with law firms.

Led a collaborative academic project developing optimal poker bluffing strategies through mathematical modeling. Built formal models of strategic risk and presented analysis of mixed-strategy equilibria.

Comparative analysis of error distributions in server logs, identifying trends and patterns relevant to server management and system stability. Turned raw log data into actionable operational insights.